Mostrar el registro sencillo del ítem
Designing a narrow band PLC front-end platform
dc.contributor.author | Alexandres Fernández, Sadot | es-ES |
dc.contributor.author | Matanza Domingo, Javier | es-ES |
dc.contributor.author | Rodríguez-Morcillo García, Carlos | es-ES |
dc.contributor.author | Ramírez-Angulo, Jaime | es-ES |
dc.date.accessioned | 2016-01-15T11:26:10Z | |
dc.date.available | 2016-01-15T11:26:10Z | |
dc.date.issued | 2013-11-27 | es_ES |
dc.identifier.uri | http://hdl.handle.net/11531/5484 | |
dc.description | Capítulos en libros | es_ES |
dc.description.abstract | es-ES | |
dc.description.abstract | Power Line Communications has been recently again seen by energy companies as a useful and natural technology for performing Automatic Meter Reading (AMR) within the currently smart grid network concept. This paper presents a hardware platform proposal for the physical communication layer using Power Line Communications technology and the PRIME parameters specifications. The hardware targets are ASIC and programmable logic devices. This platform aims also the assessment of the effects of different noise sources, main problem of power line technology. The platform is focused on introducing solutions in hardware to mitigate impulsive noise reported for authors in literature. It is well know that the physical noise, such as background and impulsive noise sources, generate severe disruptions in the communication channel. The platform is a first step to evaluate the communication performance with hostile environments in the physical layer. | en-GB |
dc.format.mimetype | application/pdf | es_ES |
dc.language.iso | en-GB | es_ES |
dc.publisher | CEIT (Centro de Estudios e Investigaciones Técnicas), Universidad de Navarra (San Sebastián, España) | es_ES |
dc.rights | es_ES | |
dc.rights.uri | es_ES | |
dc.source | Libro: Conference on Design of Circuits and Integrated Systems - DCIS 2013, Página inicial: 522-526, Página final: | es_ES |
dc.subject.other | Instituto de Investigación Tecnológica (IIT) | es_ES |
dc.title | Designing a narrow band PLC front-end platform | es_ES |
dc.type | info:eu-repo/semantics/bookPart | es_ES |
dc.description.version | info:eu-repo/semantics/publishedVersion | es_ES |
dc.rights.accessRights | info:eu-repo/semantics/restrictedAccess | es_ES |
dc.keywords | es-ES | |
dc.keywords | Power Line Communication, PRIME, OFDM, System on Chip, ASIC, Matlab, FPGA | en-GB |
Ficheros en el ítem
Este ítem aparece en la(s) siguiente(s) colección(ones)
-
Artículos
Artículos de revista, capítulos de libro y contribuciones en congresos publicadas.